Advanced Micro Devices (AMD)
Advanced Micro Devices (AMD)
Second-largest merchant-silicon AI accelerator vendor; primary Nvidia competitor for hyperscaler AI compute. AMD's $60B Meta deal (February 2026) is the largest single merchant-silicon hardware procurement in Magnificent Seven history. Tracked here for competitive dynamics vs. nvidia and the cuda-moat-erosion-at-inference thesis.
MI400 lineup (CES 2026, January 2026)
- MI455X (flagship), MI440X (enterprise), MI430X (sovereign/HPC) — CDNA 5 architecture
- 432GB HBM4, 19.6 TB/sec memory bandwidth
- MI455X powers Helios rack-scale platform: up to 3 AI exaflops per rack, shipping Q3 2026
- MI500 (CDNA 6, 2027): claiming 1,000x performance increase over MI300X (company claim; unverified)
From 2026-05-26-autoresearch-semis-ai-infra-macro-scan-may-23-26-2026.
AMD-Meta $60B deal (February 24, 2026)
- 5-year, $60B agreement; 6GW of custom AMD MI450 GPUs (co-engineered with Meta) starting H2 2026 — largest single merchant-silicon hardware procurement in Magnificent Seven history
- Performance-based warrants: Meta can acquire up to 160 million AMD shares
- First 1GW deployment begins H2 2026; MI450 = CDNA 5, 432GB HBM4, 20 PFLOPS FP8
- Meta "starting to train on AMD" — training (not just inference) is the stated use case
- AMD total committed GPU deployments: ~12GW (Meta 6GW + Microsoft/OpenAI ~6GW combined)
From 2026-05-26-autoresearch-semis-ai-infra-macro-scan-may-23-26-2026.
Scale vs. Nvidia
AMD's $60B / 12GW committed is impressive in absolute terms, but Nvidia's Q1 FY2027 data center revenue was $75.2B in a single quarter — approximately 10:1 revenue gap. The competitive dynamic is real but AMD's timeline to material Nvidia share erosion is 2027–2028 at earliest.
SemiAnalysis conditional upgrade — "great chance of success" (2026-07-25)
The first credible upgrade of AMD's odds at eroding Nvidia's software moat, from an independent written analyst. From 2026-07-25-feed-semianalysis-can-amd-break-the-cuda-moat:
- The upgrade + its two conditions. SemiAnalysis moves AMD from "0% chance" (early 2025) to "a great chance of success" — conditional on solving (1) a slow Helios rack production ramp (flyover-cable design vs Nvidia's cableless; 550+ Broadcom retimers per rack) and (2) unstable internal GPU clusters for ROCm dev/CI, which bottleneck distributed-inference optimization.
- The binding technical gate. The competitive frontier has moved from single-node aggregated to multi-node disaggregated inference, where AMD has a "software composability problem" — individual optimizations (WideEP, DP-attention, tensor-parallel) work, but combining them breaks.
- MI455X silicon. First datacenter 2nm package (vs Nvidia N3); 432GB HBM4 (12 stacks) vs Rubin 288GB; 23.3 TB/s bandwidth vs Rubin's 22 — but "lacking the 3-bit LUT tensor cores that Rubin SM107 has," so "forced to be aggressive on silicon to compensate."
- Hyperscaler commitments (early revenue). Anthropic 2GW; Microsoft/Azure Helios with OpenAI as end-customer; Meta "about-face" ordering a cut-down MI455X (4 compute dies vs 8) for recommendation systems.
- Tradeable read. Conditional long: AMD is the merchant-silicon #2 with real hyperscaler wins, but the upgrade is gated on two unresolved execution risks. Note the same source's caveat that AMD gaining share does not imply NVDA does poorly — "the pie is growing rapidly for everyone." Part 3 TCO ("~105% equity-rebate discount" for OpenAI/Meta) is paywalled/unverified. See cuda-moat-erosion-to-nvda-rerate.
Venice / foundry (official TSMC, not a fetched Samsung close)
AMD's 2026-05-21 release: EPYC "Venice" "is ramping production in Taiwan on TSMC’s advanced 2nm process technology, with future plans to ramp production at TSMC’s Arizona fabrication facility." The follow-on "Verano" is also framed as TSMC 2nm. This is the official counter to the May wiki line that AMD was evaluating Samsung SF2P for Venice — no fetched post-May primary confirms a closed Samsung 2nm CPU order. From 2026-08-24-autoresearch-samsung-foundry-q2-as-a-third-alternative.