Autoresearch: CoWoS advanced packaging — Nvidia $150B Taiwan, Vera Rubin ramp, capacity update, May 29, 2026
Nvidia pledges $150B/year in Taiwan (May 27-28, Computex); Vera Rubin 6-die architecture adds CoWoS demand; TSMC scaling 35k→130k wafers/month by late 2026 (Nvidia 60%, Broadcom 20%, AMD 11%); CoWoS-L/S fully booked; ASE CoWoP as overflow. GTC Taipei June 1 as catalyst.
Autoresearch: CoWoS advanced packaging — Nvidia $150B Taiwan, Vera Rubin ramp, capacity update, May 29, 2026
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Summary
The key development since May 26, 2026, is Jensen Huang's $150 billion/year Taiwan investment pledge (announced May 27-28 at Computex), including the Constellation Campus groundbreaking in Taipei (construction June/July 2026). Huang explicitly visited TSMC Chairman C.C. Wei to lock in Vera Rubin production commitments — the Vera Rubin platform (six-die architecture) adds fresh CoWoS demand on top of an already-sold-out line. TSMC's CoWoS capacity trajectory is on track at 130k wafers/month by late 2026, with Nvidia holding 60%+, Broadcom ~20%, AMD ~11%. Both CoWoS-L and CoWoS-S remain fully booked through 2027; ASE's CoWoP is filling overflow demand. GTC Taipei on June 1 is the next catalyst for Vera Rubin announcements.
Findings
Nvidia $150B/year Taiwan pledge — Computex, May 27-28, 2026
At Computex 2026, Jensen Huang announced Nvidia will spend ~$150 billion per year in Taiwan, up from ~$100 billion currently and an order-of-magnitude increase from $10-15 billion/year just five years ago (Reuters via investing.com; TechTimes, May 28). Huang called Taiwan "the epicentre of the AI revolution."
Constellation Campus: Nvidia's Taiwan headquarters is breaking ground June/July 2026, with full operations targeted by 2030. The campus will house ~4,000 direct Nvidia employees and generate ~10,000 total jobs. This represents a long-term, physical commitment to the Taiwan supply chain.
TSMC production meeting: During his Taiwan visit (May 23), Huang met with TSMC Chairman C.C. Wei to discuss Vera Rubin production commitments — the conversation was explicitly about packaging capacity for the next-generation platform (Digitimes May 23).
The $150B commitment is a capex-implication statement of the highest order — it locks in TSMC and Taiwan supply chain picks-and-shovels for a multi-year run.
Vera Rubin CoWoS demand: Six-die architecture adds fresh pressure
Vera Rubin's architecture adds fresh CoWoS demand beyond the Blackwell GB300 run. Vera Rubin is a six-chip multi-die system, requiring more CoWoS interposer area per unit than GB300's architecture (TechTimes article). This means TSMC must simultaneously ramp CoWoS capacity for GB300 tail production while starting the Vera Rubin front-end ramp — straining a line that was already oversubscribed.
Huang called Vera Rubin "the most successful product generation in Nvidia's history" and "the biggest product ramp in computer history" (Digitimes May 23).
GTC Taipei on June 1, 2026 is the next public announcement milestone — watch for Vera Rubin shipment timeline, customer counts, and any CoWoS-specific commentary.
CoWoS capacity trajectory: On track for 130k wafers/month late 2026
TSMC's CoWoS capacity ramp:
- Late 2024: ~35,000 wafers/month
- End 2025: ~75,000 wafers/month (doubled)
- Late 2026 target: ~130,000 wafers/month (~4x from late 2024) (FinancialContent, February 2026)
At 130k wafers/month annualized = ~1.56M wafers/year. Allocation reported by multiple sources:
- Nvidia: 800-850k wafers/year (>50%, some sources say 60%) (Morgan Stanley via X/Jukan)
- Broadcom: ~240k wafers/year — primarily Google TPUs, Meta custom chips, OpenAI projects
- AMD: ~105k wafers/year (MI355, MI400 series)
CoWoS-L (for large interposer products like GB300) and CoWoS-S (standard) remain fully booked through 2027 (TrendForce December 2025). No new capacity available for additional customers unless Nvidia releases allocation.
ASE CoWoP and Amkor as overflow partners
TSMC overflow is going to OSAT partners:
- ASE: Introduced CoWoP (Chip-on-Wafer-on-Package), a slightly simplified OSAT-amenable variant of CoWoS. ASE's advanced packaging revenue expected to hit $1.6B in 2025 and grow >$1B more in 2026 (search snippet, Longbridge). ASE is the most-mentioned overflow partner.
- Amkor: Amkor is positioning its advanced packaging capability for TSMC overflow. Multiple SEC filings suggest Amkor is scaling its OSAT partnerships and technology footprint for these wins (Amkor 8-K, SEC, 2026 — snippet only, file 403-blocked). The Q1 2026 Amkor deep-research already in the wiki documents Amkor's CoWoS-related pipeline.
The OSAT overflow channel is the important pick-and-shovels play here: Amkor and ASE benefit from TSMC's deliberate decision not to expand CoWoS capacity indefinitely, routing overflow demand to OSAT partners rather than building more TSMC CoWoS lines.
Who doesn't have CoWoS capacity?
With Nvidia locking 60%+ and Broadcom/AMD filling most of the rest, there is very limited CoWoS availability for smaller AI chip companies. This is the supply constraint that keeps TSMC's and Amkor's pricing power elevated. Intel IFS and Samsung Foundry are attempting to offer alternative advanced packaging (Intel's EMIB/Foveros, Samsung's X-Cube), but TSMC CoWoS remains the preferred technology for the highest-performance AI applications.
Contradictions and open questions
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$150B/year — what's the breakdown? The $150B Taiwan spend is Nvidia's total procurement from the Taiwan supply chain, not just TSMC. How much goes to TSMC vs. memory suppliers (Micron is US but DRAM from Taiwan), vs. substrates (Unimicron/Kinsus), vs. assembly (ASE/Amkor)? The CoWoS/TSMC component is the largest single line item but not the whole.
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Vera Rubin CoWoS spec: Does Vera Rubin's six-die architecture require CoWoS-L or a new generation (SoIC/CoPoS)? TSMC has been developing CoPoS (Chip-on-Package-on-Substrate) for denser stacking. If Vera Rubin requires CoPoS rather than CoWoS, the capacity numbers above are wrong — CoPoS capacity is earlier-stage.
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Amkor CoWoS revenue not directly confirmed: The Amkor 8-K search results don't include specific CoWoS win language — this is from analyst consensus framing. Paul's existing Amkor deep-research source (from May 26) has more specific data. The OSAT thesis for Amkor vs. ASE needs a direct primary source comparison.
Provenance
Rounds run: 3 (round 3 was targeted — one search on Nvidia $150B Taiwan which was brand new)
Sub-questions: Round 1: TSMC CoWoS-L expansion ahead of schedule; Amkor/ASE overflow wins Round 2: Vera Rubin CoWoS demand + Computex Jensen Huang TSMC meeting; CoWoS customer allocation AMD/Google/Broadcom Round 3: Nvidia $150B Taiwan pledge detail (confirmed May 27-28, very new)
Anchor source: HTTP 403 (Grokipedia) URLs fetched: 0 successful (all WebFetch 403)
Key search snippets:
- TechTimes: Nvidia Computex 2026, Vera Rubin strains Taiwan supply, May 24
- TechTimes: Nvidia $150B Taiwan, Constellation Campus, May 28
- Digitimes May 23: Jensen Huang lands in Taiwan, calls Vera Rubin biggest product ramp
- Reuters/investing.com: Nvidia $150B Taiwan, epicentre of AI
- FinancialContent: TSMC CoWoS 130k wafers/month by late 2026
- TrendForce December 2025: CoWoS-L/S fully booked, ASE CoWoP stepping up
- Astute Group/Morgan Stanley: Nvidia secures 60% CoWoS capacity
- itiger.com: TSMC 127k wafers/month, Nvidia 50%+, Broadcom 2nd, AMD 3rd
Tools used: WebSearch, WebFetch (all 403), grokipedia-fetch (403). Generated: 2026-05-29