SMIC (Semiconductor Manufacturing International Corporation)
SMIC (Semiconductor Manufacturing International Corporation)
China's leading domestic foundry. Primary interest here: SMIC is the fabrication home for Huawei's Ascend AI chip line — making it the infrastructure layer beneath China's domestic-chip-first AI policy.
Why it matters
If China's self-blocking of Nvidia purchases is structural (rather than transactional leverage in a negotiation), China's AI compute buildout flows entirely through domestic silicon. Huawei Ascend 950PR — fabricated by SMIC at N+2 (7nm-class) — is now the confirmed compute substrate for DeepSeek V4 (Reuters, April 2026), the first frontier-class model trained entirely on domestic Chinese silicon. As Ascend shipment volumes scale, SMIC's foundry revenue from AI chips grows.
This is a new hypothesis (May 22, 2026) — not yet an active thesis. SMIC's US ADR (SMICY) is one of the few public equity expressions of China's domestic semiconductor buildout.
Key facts
- Manufactures Huawei Ascend 950PR on SMIC N+2 node (7nm-class process). From 2026-05-22-autoresearch-china-blackwell-compute-routing-may-2026.
- Ascend 950PR specs: 1.56 PFLOPS FP4, 2.8x Nvidia H20 performance, in-house HiBL 1.0 HBM. Huawei claim; not independently benchmarked.
- Huawei Atlas 950 SuperPoD (8,192 Ascend chips, Q4 2026) claims scale to 1 million NPUs — if accurate, requires substantial SMIC foundry commitment.
- DeepSeek V4 (Reuters April 2026): first frontier-class AI model trained entirely on Ascend 950PR / SMIC silicon.
- SMIC cannot access ASML EUV tools (US export restrictions); N+2 is the effective leading edge, roughly comparable to TSMC/Samsung 7nm.
Process roadmap: N+3 teardown (SemiAnalysis STEEL, June 2026)
SemiAnalysis's STEEL teardown lab reverse-engineered the HiSilicon Kirin 9030 Pro (SMIC N+3) and produced the most concrete public read on how far SMIC can push without EUV. From 2026-06-14-feed-semianalysis-smic-n3-metal-pitch-vs-intel-18a (⚠ partial / paywalled):
- Metal pitch 32.5 nm — ~10% tighter than Intel 18A (36 nm) — but SemiAnalysis flags this as a "cherry-picked metric," not overall process superiority. Achieved via aggressive DUV self-aligned quadruple patterning (SAQP) on M0, not EUV.
- Logic density 113.4 MTr/mm² (~TSMC N6-class). For comparison, the wiki's leading-edge figures are Intel ~238 and TSMC ~313 MTr/mm² — so N+3 is a trailing-edge node compensated by multi-patterning, roughly 2-3x below the true leading edge, not at it.
- Fin profile "taller, narrower, less rounded" than TSMC N6 (aspect ratio 9.5:1 vs 7.8:1); standard cell height 228 nm; Samsung LPDDR5X-9600 on Samsung 1a; integrated package-on-package (iPoP) with organic RDL rather than silicon interposers.
- The load-bearing limit: without EUV, the SAQP/DTCO approach "increases complexity, reduces process margins, and limits further scaling." This is the export-control efficacy story in one line — controls bind on the ceiling, not the current node. SMIC can match a cherry-picked pitch metric but cannot keep scaling the planar way.
- Huawei's answer is to go vertical: the "τ (tau)" roadmap / 3D "LogicFolding" — vertically stacking active logic dies at ultra-fine pitch to shorten critical paths, plus system-technology co-optimization, as the path around planar-scaling limits. EDA-tool export restrictions forced domestic tool development (Peking University LogicFolding prototypes; diffusion across HLMC / Hua Hong).
Read-through: corroborates that US litho controls remain a real scaling constraint (EUV denial caps SMIC's roadmap), while also showing China routes around it impressively at the trailing edge and is pioneering 3D-stacking / domestic-EDA as the next axis of competition. Both legs matter for tsmc-saturation-to-intel-anchor-stack (Intel 18A's "US-leading-edge alternative" pitch is not threatened on raw density by N+3) and taiwan-chokepoint-to-allied-reshoring (China's domestic-capability floor is higher than a pure-EUV-denial reading implies).
Open questions
- What fraction of SMIC revenue is Huawei Ascend AI chip fabrication? SMIC does not break this out publicly.
- Can SMIC scale Ascend volumes to meet China's AI compute demand without access to EUV?
- Is there an equity angle in SMICY (US ADR) given SMIC is a Chinese state-affiliated company with significant regulatory and geopolitical risk?
Related
- huawei — primary customer for Ascend AI chips
- china-blackwell-offshore-compute-routing — the question that surfaces SMIC as beneficiary
- nvidia — the displaced alternative
- tsmc-saturation-to-intel-anchor-stack — Intel 18A's leading-edge-alternative positioning vs the N+3 density read
- taiwan-chokepoint-to-allied-reshoring — China's domestic-fab capability floor under EUV denial
- 2026-06-14-feed-semianalysis-smic-n3-metal-pitch-vs-intel-18a — N+3 teardown source