Autoresearch: Macro Bucket — Semis & AI Infrastructure Forcing Functions, May 2026

Generated by /autoresearch on 2026-05-11. Synthesized from WebSearch snippets. Context: vault/projects/stock-market

Summary

The AI infrastructure CapEx sprint is dramatically larger than most estimates from even 6 months ago: TrendForce (May 6) revised the combined 2026 CapEx of the top 9 cloud providers to $830 billion (+79% YoY), with Microsoft at $190B, AWS at $230B+, and Google at $180–190B. Two new forcing functions emerged: HBM (High Bandwidth Memory) is the primary bottleneck in the AI silicon chain (most capacity pre-committed through 2026), and TSMC's CoWoS advanced-packaging capacity is 50%+ consumed by Nvidia alone, leaving AMD, Broadcom, and Google TPU competing for scraps. DRAM spot price has risen to $9.71/GB in 2026 from $3.76 in 2025 — a 158% increase. Both constraints benefit specific suppliers distinct from the Intel/foundry trade the project currently tracks.

Findings

CSP CapEx revised to $830B — 79% YoY growth

TrendForce (May 6, 2026): Top-9 CSP combined 2026 CapEx now at $830B, annual growth rate revised upward from 61% to 79%. Microsoft alone increased its CapEx outlook to $190B (130% YoY), of which $25 billion is attributed specifically to increased memory and chip costs (Tom's Hardware). AWS expected to exceed $230B (50%+ YoY). Google $180–190B (100%+ YoY).

Why this matters for chain-tracing: A $830B CapEx pool at 79% growth doesn't primarily flow to Intel or TSMC on the logic-foundry side — it flows to: (1) GPU/accelerator vendors (Nvidia primarily), (2) memory/HBM suppliers, (3) advanced packaging capacity (CoWoS, OSAT), (4) networking/power infrastructure. The Intel/foundry trade benefits from a fraction of this — the custom silicon segment.

HBM bottleneck: SK Hynix dominant, supply pre-committed through 2026

High-bandwidth memory (HBM) is the current primary constraint in the AI accelerator chain. Most HBM capacity is pre-committed through 2026, with forward allocations extending to 2027. SK Hynix is the dominant HBM supplier (market leader with HBM3E). Micron is catching up. Samsung HBM has had yield challenges.

HBM is a picks-and-shovels trade independent of the Intel/TSMC/Samsung foundry competition — HBM attaches to GPU accelerators regardless of which foundry makes the GPU die. SK Hynix (ticker: 000660.KS, or via ADR-equivalent exposure through ETFs) and Micron (MU) are the direct beneficiaries.

New chain candidate: HBM supply constraint → SK Hynix (dominant) and Micron (ramp) as primary beneficiaries as hyperscalers pay 158% more per GB and can't get enough.

CoWoS advanced packaging: Nvidia booking 50%+ of TSMC's capacity

Nvidia has booked an estimated 800,000–850,000 wafers of TSMC's CoWoS (Chip-on-Wafer-on-Substrate) advanced packaging capacity for 2026 — consuming over half of total CoWoS output. AMD, Broadcom (custom AI ASICs), and Google TPU are competing for the remainder (CNAS analysis). CoWoS is the packaging technology that integrates GPU + HBM into a single package.

New chain candidate: CoWoS capacity is a TSMC monopoly for now — but TSMC's CoWoS expansion benefits its packaging equipment suppliers (ASML, AMAT, LRCX, BESI for flip-chip bonding). Any customer who can't get CoWoS capacity faces a supply ceiling on AI accelerator production. This is separate from the foundry-logic thesis but compounds the importance of TSMC's overall capex build.

Hypothesis chain: Meta's "AI capex reset" — one search result headline ("Meta's AI Capex Reset Turns Supply Chain Into a Board-Level Constraint") suggests Meta is adjusting its AI infrastructure strategy in a way that creates downstream supply chain implications. This warrants a follow-up autoresearch.

DRAM prices: 158% increase in 12 months

DRAM: $9.71/GB in 2026 vs $3.76/GB in 2025 — driven by AI demand. Benefits DRAM producers directly (Micron MU, SK Hynix, Samsung). This is a distinct trade from the HBM play: commodity DRAM (DDR5 for servers) is also surging even apart from the premium HBM segment.

New chain candidates for hypothesis pages

1. HBM supply chain: HBM is the binding constraint for AI accelerator output → SK Hynix (dominant supplier, ~50%+ HBM market share) and Micron (catching up, US-domiciled) benefit directly. Micron has US political tailwind (CHIPS Act recipient). Ticker: MU (strong claim); SK Hynix exposure via SOXX/AMAT indirectly.

2. CoWoS capacity expansion equipment: TSMC's CoWoS ramp requires specific bonding/packaging tools → BESI (BE Semiconductor Industries, Netherlands), AMAT, and ASE Technology (ASEH) are the packaging-specific suppliers. BESI specifically dominates die-attach for advanced packaging. Not yet on the wiki.

3. AI power infrastructure: $830B CSP CapEx creates grid/power demand — covered further in Energy bucket.

Contradictions and open questions

• "Meta's AI capex reset" was flagged in search but not detailed — the direction of the reset (up or down, toward custom silicon or away) is unknown. High priority for a follow-up search.
• The $830B CSP CapEx figure includes data center construction, networking, power, and software — not all of it is silicon. The portion flowing to foundry/HBM/CoWoS needs segmenting.

Provenance

Sub-questions: CSP CapEx revisions and growth rate; primary AI silicon bottleneck (HBM vs. CoWoS vs. foundry); DRAM price trajectory and beneficiaries.

URLs fetched: 0 (all 403). Snippets from TrendForce (May 6), Tom's Hardware, CNAS, Futurum, alcapitaladvisory.com, financialcontent.com.

Generated: 2026-05-11