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TSMC (Taiwan Semiconductor Manufacturing Co.)

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TSMC (Taiwan Semiconductor Manufacturing Co.)

One-line summary: World's leading-edge foundry; capacity capped roughly 3x short of AI demand per CEO C.C. Wei (Nov 20 2025, SIA Awards), with four consecutive years of price increases starting 2026 — both the supply discipline that makes TSM bullish and the constraint that drives customers to alternatives.

What it is

Taiwan-based pure-play foundry; produces leading-edge nodes (N3, N2, A16) for fabless customers including Apple, Nvidia, AMD, Qualcomm, Broadcom, and (for AI-specific silicon) every major hyperscaler. Geographic diversification underway: Arizona, Kumamoto (Japan), and Dresden (Germany) fabs in various stages of ramp.

Why it matters to stock-market

TSMC's capacity squeeze is the forcing function behind every "alternative-foundry" thesis tracked by this project. Without TSMC's specific, public, multi-source acknowledgement of the shortfall, the us-fab-capacity-bottleneck thesis doesn't have a load-bearing macro driver.

Key facts

  • Capacity acknowledgement: CEO C.C. Wei stated capacity is "about three times short" of customer plans at the Semiconductor Industry Association Awards in San Jose, November 20, 2025. He reportedly considered wearing a shirt reading "No more wafers" to dramatize the imbalance.
  • 2nm: combined Taiwan capacity ~90,000–100,000 wafers/month early 2026; both plants fully booked through 2026.
  • 3nm: ~120–130k wafers/month end of 2025; projected to ~180k by end of 2026 (+40% YoY); booked through 2028 per industry consensus.
  • Pricing: customers notified of price increases on 2nm wafers for four consecutive years starting 2026.
  • Capex response: $56B into new fabs; Wei admitted shortages will drag into 2027 and beyond. Arizona 2nd fab 3nm volume production targeted 2H27; Kumamoto 2028.
  • Q1 2026 earnings (April 16, 2026 — primary source): Revenue $35.9B (+6.4% QoQ, slightly above guidance); gross margin 66.2% (+390bps QoQ); operating margin 58.1%. Full-year 2026 raised to >30% YoY growth in USD. CapEx guidance toward high end of $52-56B range. Q2 guide: $39.0-40.2B. From 2026-04-16-earnings-tsm-q1-2026.
  • cc-wei in 2026-04-16-earnings-tsm-q1-2026: "N2 technology ramping successfully in high-volume manufacturing with good yield." A14 advanced node development progressing on track for 2028 volume production. N3 gross margin to "cross over to the corporate average in second half 2026." "Sustained supply-demand tightness expected through 2027."
  • cc-wei in 2026-04-16-earnings-tsm-q1-2026: "Middle East situation may impact chemical and gas pricing" — first direct TSMC management callout of the helium/process gas risk from Iran/Hormuz disruption. Directly corroborates helium-supply-crisis-semicap thesis from a TSMC primary source.
  • N2 in high-volume manufacturing (HVM) since Q4 2025 with "good yield"; ramping across Hsinchu P20 and Kaohsiung P22/P23. Apple holds ~50%+ of 2026–2027 N2 allocation (iPhone A19, M5); remaining slots: hyperscaler AI accelerators. From 2026-05-20-autoresearch-tsmc-capacity-pricing-power-n2-cowos-may-2026.
  • 2026 price hikes: 5–10% across advanced nodes; N2 wafers ~$30,000 (vs N3 ~$20,000); A16 rumored ~$45,000. Step-function pricing at each new node confirms TSMC's pricing power thesis. From 2026-05-20-autoresearch-tsmc-capacity-pricing-power-n2-cowos-may-2026.
  • CoWoS fully sold through 2027; 50+ week lead times; management aggressively building CoWoS capacity and packaging-focused fabs. From 2026-05-20-autoresearch-tsmc-capacity-pricing-power-n2-cowos-may-2026.
  • High-NA EUV strategy: TSMC is skipping High-NA at 2nm (using Low-NA + multi-patterning); will adopt High-NA at 1.4nm — means Intel leads TSMC in High-NA experience through 2026–2027 window, though TSMC's 2nm is already ramping with proven yields.
  • CoWoS advanced packaging: Nvidia has booked ~800–850K wafers of TSMC's CoWoS capacity in 2026, consuming over 50% of total CoWoS output — AMD, Broadcom, and Google TPU competing for the remainder. See cowos-packaging-capacity-crunch.
  • Taiwan geopolitical risk: Framing from Odd Lots (May 2026): if China seizes or disables Taiwan fabs, that is "a hard reset of the entire global economic system since 1989." Separately, if the US successfully reshores advanced chip manufacturing, Taiwan's "silicon shield" geopolitical protection weakens. See us-fab-capacity-bottleneck for thesis implications.
  • Customer vantage — cerebras (5nm, not constrained): andrew-feldman in 2026-05-21-odd-lots-why-cerebras-ceo-andrew-feldman-built-the-world-s reports that for Cerebras's wafer-scale chip on 5nm (not the most-pressured 3nm node), "TSMC has given us as many wafers as we've needed" — and that the industry-wide binding constraint right now is "data centers... powered buildings," not fab allocation, "for the next 15 or 18 months." Nuance for the saturation thesis: TSMC's capacity squeeze is concentrated at 3nm/leading-edge and at CoWoS; a 5nm-and-no-CoWoS customer can be fully supplied. The "3x short" framing is node-specific, not blanket. See inference-demand-to-wafer-scale-advantage.
  • Customer vantage — etched (N4 inference-ASIC startup): gavin-uberti in 2026-06-30-podcast-invest-like-the-best-etched-building-ai-hardware-to-make-inference: "TSMC customer service is way, way better than I have seen at any other company in any other industry... you can go make them a recommendation and then we'll go run the experiment on their own dime... It is why they are the number one and why they're going to win." TSMC also engaged Etched pre-funding ("willing to work with us back before we raised any of that $100 million"). Second first-person customer testimony (after Feldman/Cerebras) that TSMC's service/collaboration moat — not just process leadership — locks in the ASIC wave; Etched deliberately sits on N4 + a different HBM than Rubin, so ASIC demand is additive across nodes. See inference-asic-wave-to-tsm-demand-broadening. (Interested-party source: founders on their investor's podcast.)
  • Praise (customer testimony): Feldman calls TSMC "the greatest manufacturing company on earth by far," "the national champion of Taiwan," and "an extraordinary partner from the get-go"; collaborated closely with TSMC on lithography to make wafer-scale work.

Q2 FY2026 earnings (2026-07-16 call — primary source)

From 2026-07-16-earnings-tsm-q2-fy2026 unless otherwise noted. This is the densest first-party chain source of the quarter.

  • The quarter: revenue $40.2B (+33.7% YoY, high end of guidance); gross margin 67.7% (+150bps QoQ); 2nm 3% of wafer revenue, 3nm 30%, 5nm 33%, 7nm 11%; advanced (≤7nm) 77%. HPC +20% QoQ to 66% of revenue; smartphone −4% QoQ to 22%. Cash/marketable securities $110B. Q2 capex $15.7B.
  • Guidance: Q3 revenue $44.6–45.8B (+12% QoQ, +37% YoY at midpoint); Q3 GM 65–67%, OM 56–58%. Full-year 2026 growth raised to "slightly above 40%" YoY in USD (from ">30%" at Q1).
  • ★ Capex raised to $60–64B — from $52–56B in January and "closer to $56B" in April. wendell-huang: "Given the continued strong structural demand from our customers, including the newly emerging agentic AI market, we have decided to raise our full year 2026 capital budget to be between $60 billion and $64 billion." Split: 70–80% advanced process, ~10% specialty, 10–20% advanced packaging + testing + mask making. Two stated drivers, and only one is capacity — see semicap-tool-price-inflation.
  • ★★ Additional $100B Arizona investment announcedcc-wei: "we would like to announce an additional $100 billion investment in Arizona. This is to build several more semiconductor logical wafer fab for 2 nm and below technologies, as well as advanced packaging fabs to support the strong multi-year demand from our leading U.S. customers." No firm schedule ("Most of the time, it depends on the market situation and our customers' demand... we try to speed it up as fast as possible"). Simultaneously 13 leading-edge and advanced packaging fabs in Taiwan over the next several years. Bears on taiwan-chokepoint-to-allied-reshoring and us-fab-capacity-bottleneck.
  • ★★ Advanced packaging is the binding constraint, stated by the suppliercc-wei: "our packaging capacity is so tight that now it's limiting my customers' growth." He welcomes Intel's EMIB-T as relief because it would unlock stranded front-end wafer revenue. See cowos-packaging-capacity-crunch, hbm-cowos-as-binding-bottleneck.
  • ★ Agentic AI → CPU resurgencecc-wei: "The emergence of agentic AI is leading to a resurgence in the role of CPUs in AI data centers, which drive more silicon demand in addition to AI accelerators... whether it's a x86, Arm-based, or RISC-V architecture, they are almost all TSMC's customers." See agentic-ai-cpu-resurgence.
  • Demand/supply gap refused quantification — asked whether unconstrained ≤3nm demand exceeds supply by 30–50% or more, cc-wei: "No, we don't have a number to share. Let me say that the gap is very big." Asked for an updated AI CAGR (prior guide: mid-to-high 50%), he declined a number: "it's stronger and stronger... Stronger than what we said before." Asked whether the 2nm-family 70% capacity CAGR from the Symposium still holds: "Okay, now is bigger. That's all I say."
  • Demand durationcc-wei: "I believe from this day on all the way to probably 2029, 2030, the demand is very strong. Whether in between there's a dip or not, I'm not very sure."
  • Margin headwinds (falsifier material)wendell-huang: 2nm steep ramp dilutes GM by 3–4pts in H2 2026; overseas-fab dilution 2–3% early, widening to 3–4% in later stages.
  • Consumer end-market weakness, namedcc-wei: "consumer and the price-sensitive end market segment are being challenged due to the impact of rising component prices and macroeconomic uncertainties." First-party pass-through evidence — see secondary-device-market-supply-constraint.
  • Mature node — shortage is AI-adjacent onlycc-wei: "Only the one which are related to AI is in shortage... power management IC... Also, the sensor portion... Other than that... the consumer product is not in a high demand." Expanding mature-node capacity selectively via JASM Fab 1 (Japan, CMOS image sensors) and ESMC (Germany, automotive/industrial). See mature-node-ai-adjacent-shortage.
  • A14 family roadmap: A14 = 2nd-gen nanosheet; vs N2 gives 10–15% speed at same power, 25–30% power at same speed, ~20% density. Internal vehicles at ~90% device performance and ~90% 256Mb SRAM yield; tape-outs "ahead of schedule"; pre-production 2027, volume production 2028. Extensions A13 (>6% die-area saving via 97% optical shrink, backward-compatible design rules) and A12 (Super Power Rail) both volume 2029. Wei: lead time to develop + build + ramp a node "now takes five to seven years. There are no shortcuts."
  • N3 expansion: three additional 3nm fabs (Taiwan, Arizona, Japan); converting 5nm tools to 3nm in Taiwan; flexible capacity across N7/N5/N3.
  • COUPE (co-packaged optics): "We start the production right now, and it will be ramped up."
  • Glass substrate: pilot line "will take about another one year to be mature so we can put it into the production."
  • High-NA: not adopting on cost/maturity grounds — "We always consider that technology maturity and the cost, and whether we use it or not."
  • ★ TSMC explicitly refuses vendor financing — asked whether TSMC would finance or invest in its customers' customers the way Nvidia does, cc-wei: "So far, no, TSMC don't do this kind of financial arrangement because of we think we are working with current customer with the current model smoothly and also successfully." A pointed contrast with the Nvidia backstop model — see nvidia-gpu-backstop-to-neocloud-financeability.
  • Demand-verification discipline (bears on phantom load)cc-wei: "I believe every customer tell me the truth. Everyone. You put all the truths together, it's not the truth. We have to make some of the judgment... Actually, we are checking the AI data centers of progress, the building, the location, the demand, the rest. We checking all that to make sure that TSMC's chips will not be put in inventory." See phantom-data-center-load.
  • Competitive posture: on Samsung ("One of my competitor in South Korea, they make a huge amount of money, and I'm jealousy about it") and Intel ("they got a very strong U.S. government support. We also got the government support, by the way, although we don't announce it"). His moat claim: "technology, manufacturing, and customer trust. These three fundamental never change." And on switching costs: "choosing a technology, ramping it up, is not buying a milk from 7-Eleven."
  • Pricing philosophycc-wei: "We don't suddenly increase our price by, which I like to have, a 4x or 5x... We earn our value, and we make sure that our profit, our gross margin, is enough for our long-term sustaining expansion." And the memory-envy tell: "I'm really jealous about memory companies, 86% gross margin. 86%? About 68%, I would be happy about that."
  • Customer concentration dismissed — asked about top-5 concentration at a historical high, cc-wei: "No, that's not our concern... There's a lot of new player in the AI industry."

Strengths (from a thesis-input perspective)

  • Sustained pricing power for 4+ years
  • Demand visibility through 2028 at advanced nodes
  • Geographic diversification reduces Taiwan-risk premium over time
  • Best-in-class yield and process leadership

Weaknesses (from a thesis-input perspective)

  • Customer concentration risk concentrates as hyperscalers and Apple seek alternatives
  • Capacity expansion lags demand by years (Arizona 3nm not until 2H27)
  • Geopolitical risk (Taiwan / cross-strait) unhedged for the leading-edge majority
  • Pricing power may push customers permanently toward alternatives once they qualify Intel or Samsung

Open questions

Sources

Related

Referenced by
Mechanisms
Agentic AI → CPU resurgence in AI datacenters → additive silicon demand, ISA-agnostic → TSM captures it whoever wins; server-CPU scarcity is the corroborating tellAI memory crowd-out → consumer device price shock → replacement-cycle extension → trade-in acquisition becomes the scarce asset → AIZAI memory crowd-out → non-LTA buyers are the residual claimants → device units fall but revenue holds → the consumer dollar transfers from OEM to memory supplierHBM pre-committed + CoWoS half-owned by Nvidia → DRAM spot price +158% → memory/packaging bottleneck downstream of foundryInference-demand explosion → wafer-scale fast-memory architecture → routes around HBM/CoWoS/3nm → constraint shifts to data centersJan 2026 tariffs + Taiwan trade deal + CHIPS Act expansion → 5pp cost-incentive shift → US-domiciled fab beneficiary stackSamsung SF2P yields hit 70% + Taylor 90% ready + Apple visit → genuine third foundry leg → order flow splits, not concentratesTaiwan chokepoint → frontier-AI supply at risk → allied-reshoring imperativeTaiwan energy blockade → island browns out in <3 weeks → fabs power down → 90-day restart → global shock, no shot firedTSMC packaging scarcity caps customer growth → strands TSMC's own (larger) front-end wafer revenue → incumbent welcomes a second-source packager → Intel EMIB-T demand is validated by the monopolist itselfTSMC saturation → 4-year price hikes → marginal buyers shift → Intel anchor stack → re-rate
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