TSMC (Taiwan Semiconductor Manufacturing Co.)
TSMC (Taiwan Semiconductor Manufacturing Co.)
One-line summary: World's leading-edge foundry; capacity capped roughly 3x short of AI demand per CEO C.C. Wei (Nov 20 2025, SIA Awards), with four consecutive years of price increases starting 2026 — both the supply discipline that makes TSM bullish and the constraint that drives customers to alternatives.
What it is
Taiwan-based pure-play foundry; produces leading-edge nodes (N3, N2, A16) for fabless customers including Apple, Nvidia, AMD, Qualcomm, Broadcom, and (for AI-specific silicon) every major hyperscaler. Geographic diversification underway: Arizona, Kumamoto (Japan), and Dresden (Germany) fabs in various stages of ramp.
Why it matters to stock-market
TSMC's capacity squeeze is the forcing function behind every "alternative-foundry" thesis tracked by this project. Without TSMC's specific, public, multi-source acknowledgement of the shortfall, the us-fab-capacity-bottleneck thesis doesn't have a load-bearing macro driver.
Key facts
- Capacity acknowledgement: CEO C.C. Wei stated capacity is "about three times short" of customer plans at the Semiconductor Industry Association Awards in San Jose, November 20, 2025. He reportedly considered wearing a shirt reading "No more wafers" to dramatize the imbalance.
- 2nm: combined Taiwan capacity ~90,000–100,000 wafers/month early 2026; both plants fully booked through 2026.
- 3nm: ~120–130k wafers/month end of 2025; projected to ~180k by end of 2026 (+40% YoY); booked through 2028 per industry consensus.
- Pricing: customers notified of price increases on 2nm wafers for four consecutive years starting 2026.
- Capex response: $56B into new fabs; Wei admitted shortages will drag into 2027 and beyond. Arizona 2nd fab 3nm volume production targeted 2H27; Kumamoto 2028.
- Q1 2026 earnings (April 17, 2026): Revenue $35.9B (above guidance; +6.4% QoQ in USD, +8.4% NTD); Q2 2026 guide $39.0–40.2B (midpoint ~+32% YoY); full-year guidance raised to >30% revenue growth in USD. Q1 CapEx: $11.1B (accelerated N3/N2). From 2026-05-20-autoresearch-tsmc-capacity-pricing-power-n2-cowos-may-2026.
- N2 in high-volume manufacturing (HVM) since Q4 2025 with "good yield"; ramping across Hsinchu P20 and Kaohsiung P22/P23. Apple holds ~50%+ of 2026–2027 N2 allocation (iPhone A19, M5); remaining slots: hyperscaler AI accelerators. From 2026-05-20-autoresearch-tsmc-capacity-pricing-power-n2-cowos-may-2026.
- 2026 price hikes: 5–10% across advanced nodes; N2 wafers ~$30,000 (vs N3 ~$20,000); A16 rumored ~$45,000. Step-function pricing at each new node confirms TSMC's pricing power thesis. From 2026-05-20-autoresearch-tsmc-capacity-pricing-power-n2-cowos-may-2026.
- CoWoS fully sold through 2027; 50+ week lead times; management aggressively building CoWoS capacity and packaging-focused fabs. From 2026-05-20-autoresearch-tsmc-capacity-pricing-power-n2-cowos-may-2026.
- High-NA EUV strategy: TSMC is skipping High-NA at 2nm (using Low-NA + multi-patterning); will adopt High-NA at 1.4nm — means Intel leads TSMC in High-NA experience through 2026–2027 window, though TSMC's 2nm is already ramping with proven yields.
- CoWoS advanced packaging: Nvidia has booked ~800–850K wafers of TSMC's CoWoS capacity in 2026, consuming over 50% of total CoWoS output — AMD, Broadcom, and Google TPU competing for the remainder. See cowos-packaging-capacity-crunch.
- Taiwan geopolitical risk: Framing from Odd Lots (May 2026): if China seizes or disables Taiwan fabs, that is "a hard reset of the entire global economic system since 1989." Separately, if the US successfully reshores advanced chip manufacturing, Taiwan's "silicon shield" geopolitical protection weakens. See us-fab-capacity-bottleneck for thesis implications.
- Customer vantage — cerebras (5nm, not constrained): andrew-feldman in 2026-05-21-odd-lots-why-cerebras-ceo-andrew-feldman-built-the-world-s reports that for Cerebras's wafer-scale chip on 5nm (not the most-pressured 3nm node), "TSMC has given us as many wafers as we've needed" — and that the industry-wide binding constraint right now is "data centers... powered buildings," not fab allocation, "for the next 15 or 18 months." Nuance for the saturation thesis: TSMC's capacity squeeze is concentrated at 3nm/leading-edge and at CoWoS; a 5nm-and-no-CoWoS customer can be fully supplied. The "3x short" framing is node-specific, not blanket. See inference-demand-to-wafer-scale-advantage.
- Praise (customer testimony): Feldman calls TSMC "the greatest manufacturing company on earth by far," "the national champion of Taiwan," and "an extraordinary partner from the get-go"; collaborated closely with TSMC on lithography to make wafer-scale work.
Strengths (from a thesis-input perspective)
- Sustained pricing power for 4+ years
- Demand visibility through 2028 at advanced nodes
- Geographic diversification reduces Taiwan-risk premium over time
- Best-in-class yield and process leadership
Weaknesses (from a thesis-input perspective)
- Customer concentration risk concentrates as hyperscalers and Apple seek alternatives
- Capacity expansion lags demand by years (Arizona 3nm not until 2H27)
- Geopolitical risk (Taiwan / cross-strait) unhedged for the leading-edge majority
- Pricing power may push customers permanently toward alternatives once they qualify Intel or Samsung
Open questions
- samsung-foundry-as-third-alternative — does Samsung's recovery weaken the bilateral TSMC/Intel framing?
Sources
- 2026-05-08-autoresearch-intel-foundry-anchor-customers
- 2026-05-11-autoresearch-macro-semis-ai-infrastructure-may-2026
- 2026-05-01-odd-lots-how-taiwan-became-the-worlds-most-perilous-geopolitical
- 2026-05-21-odd-lots-why-cerebras-ceo-andrew-feldman-built-the-world-s (multi-context)